Method of manufacturing a semiconductor device having raised source and drain of differing heights
US8093130B2 · kind B2 · utility
3Cited by
4References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 30, 2008 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jun 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0133
Abstract
This semiconductor device has an MOS transistor equipped with a gate electrode formed on a semiconductor substrate, a source region next to one side of the gate electrode, and a drain region next to another side of the gate electrode, wherein an upper end of the source region and an upper end of the drain region are at positions which are higher than a top surface of the semiconductor substrate, and the height of the upper end of the drain region differs from the height of the upper end of the source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.