Pad design with buffers for STT-MRAM or other short pulse signal transmission
US8094486B2 · kind B2 · utility
1Cited by
4References
45Claims
0Family size
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Key dates
| Filing date | Feb 2, 2009 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jun 20, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49069
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) bit cell array is provided. The STT-MRAM array includes a STT-MRAM bit cell and an input net coupled to the STT-MRAM bit cell. The STT-MRAM array includes a pulse signal input pad and a buffer coupled between the pulse signal input pad and the input net. In an aspect, the input net is one of a bit line, a word line, and a source line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.