Memory block testing
US8094508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2009 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Jul 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory block of a memory device is tested by programming a plurality of pages of the memory block, passing the memory block if a number of pages, each programmed in a first programming time, is greater than or equal to a first predetermined number and a number of pages, each programmed in a second programming time, is less than or equal to a second predetermined number, and failing the memory block if a programming time of any one of the pages exceeds a predetermined programming time or if the number of pages programmed in the first programming time is less than the first predetermined number or if the number of pages programmed in the second programming time exceeds the second predetermined number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.