Semiconductor device having P-N column layer and method for manufacturing the same
US8097511B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 5, 2008 |
| Grant date | Jan 17, 2012 |
| Priority date | — |
| Expiry date | Jul 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A semiconductor device is provided, which includes a substrate; a P-N column layer disposed on the substrate; a second conductivity type epitaxial layer disposed on the P-N column layer. The P-N column layer includes first conductivity type columns and second conductivity type columns, which are alternately arranged. Each column has a tapered shape. A portion of the first conductivity type column located around the substrate has a smaller impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer. A portion of the second conductivity type column located around the substrate has a larger impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.