Translation look-aside buffer with a tag memory and method therefor
US8099580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2009 |
| Grant date | Jan 17, 2012 |
| Priority date | — |
| Expiry date | Jul 21, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0895
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A translation look-aside buffer (TLB) has a TAG memory for determining if a desired translated address is stored in the TLB. A TAG portion is compared to contents of the TAG memory without requiring a read of the TAG memory because the TAG memory has a storage portion that is constructed as a CAM. For each row of the CAM a match determination is made that indicates if the TAG portion is the same as contents of the particular row. A decoder decodes an index portion and provides an output for each row. On a per row basis the output of the decoder is logically combined with the hit/miss signals to determine if there is a hit for the TAG memory. If there is a hit for the TAG memory, a translated address corresponding to the index portion of the address is then output as the selected translated address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.