Non-volatile memory and methods with reading soft bits in non uniform schemes
US8099652B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2010 |
| Grant date | Jan 17, 2012 |
| Priority date | — |
| Expiry date | Dec 23, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.