Rounded three-dimensional germanium active channel for transistors and sensors
US8101473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2009 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Feb 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A process is provided for fabricating rounded three-dimensional germanium active channels for transistors and sensors. For forming sensors, the process comprises providing a crystalline silicon substrate; depositing an oxide mask on the crystalline silicon substrate; patterning the oxide mask with trenches to expose linear regions of the silicon substrate; epitaxially grow germanium selectively in the trenches, seeded from the silicon wafer; optionally etching the SiO2 mask partially, so that the cross section resembles a trapezoid on a stem; and annealing at an elevated temperature. The annealing process forms the rounded channel. For forming transistors, the process further comprises depositing and patterning a gate oxide and gate electrode onto this structure to form the gate stack of a MOSFET device; and after patterning the gate, implanting dopants into the source and drain located on the parts of the germanium cylinder on either side of the gate line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.