Patent · US Active

VLN biasing scheme to achieve low vertical shading for high-speed and large-format CMOS image sensors with top/bottom readout scheme

US8102451B2 · kind B2 · utility

4Cited by

3References

22Claims

0Family size

Assignee

Aptina Imaging Corporation · KY

Inventors

Yaowu Mo · San Ramon, US
Yandong Chen · Longbeilingcun, CN

Key dates

Filing date	Nov 4, 2008
Grant date	Jan 24, 2012
Priority date	—
Expiry date	Oct 18, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH04N25/78
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

A VLN biasing scheme implemented in an image sensor with top/bottom readout. A first and second current sink coupled to the top of a first column of pixels and a second column of pixels respectively. A third and fourth current sink coupled to the bottom of a first column of pixels and a second column of pixels respectively. During column readout, each current sink sinks an equal amount of current.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.