Proximity communication package for processor, cache and memory
US8102663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2007 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Dec 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A “sombrero” bridge transports signal communication between a processor and one or more cache memories. The bridge surrounds the processor's perimeter, and includes an aperture opposite the processor through which power and data can be provided to the processor from another device. The bridge exchanges signals with the cache memories via capacitively coupled proximity connections. The bridge communicates with the processor via conductive (e.g. wire) connections and optionally proximity connections. Spacing between opposing pads of the proximity connection(s) between the bridge and the cache memories can be provided by recesses in a surface of the cache memory, corresponding recesses in an opposing surface of the bridge, and a ball for each matching pair of corresponding cache memory and bridge recesses. The ball fits in and between the recesses of the matching pair. The recess depths and ball diameter(s) constrain a minimum distance between opposing pads of the proximity connection(s).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.