Inventor · Redwood City, CA, US

Anders Landin

20Patents
6h-index
13Co-inventors
58Inventor score

Filing activity: Nov 15, 2002 → Feb 4, 2009

Most-cited inventions

PatentTitleAreaCited byStatus
US7676636B2 Method and apparatus for implementing virtual transactional memory using cache line marking Physics 31 Active
US7480770B2 Semi-blocking deterministic directory coherence Physics 13 Active
US7529893B2 Multi-node system with split ownership and access right coherence mechanism Physics 10 Expired
US8102663B2 Proximity communication package for processor, cache and memory Electricity 9 Active
US8606997B2 Cache hierarchy with bounds on levels accessed Physics 8 Active
US6973547B2 Coherence message prediction mechanism and multiprocessing computer system employing the same Physics 8 Expired
US7509460B2 DRAM remote access cache in local memory in a distributed shared memory system Physics 6 Active
US7363462B2 Performing virtual to global address translation in processing subsystem Physics 6 Expired
US7376793B2 Cache coherence protocol with speculative writestream Physics 4 Expired
US7765381B2 Multi-node system in which home memory subsystem stores global to local address translation information for replicating nodes Physics 3 Expired
US7360056B2 Multi-node system in which global address generated by processing subsystem includes global to local translation information Physics 3 Expired
US7606978B2 Multi-node computer system implementing global access state dependent transactions Physics 2 Active
US8010749B2 Multi-node computer system with proxy transaction to read data from a non-owning memory device Physics 2 Active
US8024526B2 Multi-node system with global access states Physics 1 Active
US7412567B2 Value-based memory coherence support Physics 1 Active
US7120756B2 Computer system including a promise array Physics 1 Expired
US7945738B2 Multi-node computer system employing a reporting mechanism for multi-node transactions Physics 1 Active
US7360029B2 Multi-node computer system in which interfaces provide data to satisfy coherency transactions when no owning device present in modified global access state node Physics 1 Expired
US8645632B2 Speculative writestream transaction Physics 0 Active
US7055016B2 Computer system including a memory controller configured to perform pre-fetch operations Physics 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.