Method and apparatus for thermal analysis
US8104007B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2008 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Jun 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2111/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the invention provide a method for performing thermal analysis of an integrated circuit (“IC”) design layout that includes numerous circuit modules. The method divides the IC design layout into a set of elements, where at least one element includes several wires. The method computes a set of conductivity groups of values for the set of elements. The method identifies a temperature distribution for the IC design layout based on the set of conductivity groups of values. In some embodiments, each of these elements corresponds to a particular portion of a particular layer of the IC design layout. Each element includes several nodes. Each conductivity group of values is defined by entry values. Each entry value describes how heat flow at a particular node of the element is affected by a temperature change at another particular node of the element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.