Wafer with improved intrinsic gettering ability
US8106483B2 · kind B2 · utility
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5References
12Claims
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Key dates
| Filing date | Mar 29, 2011 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Mar 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3225
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit with improved intrinsic gettering ability is described, having a bulk micro-defect (BMD) density of 3.85×105-3.38×109/cm3 through first and second annealing steps. The first annealing step is performed at a first temperature in an atmosphere containing at least one of oxygen gas and nitrogen gas. The second annealing step is performed at a second temperature higher than the first temperature in the atmosphere.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.