Wafer and semiconductor package
US8110931B2 · kind B2 · utility
1Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2009 |
| Grant date | Feb 7, 2012 |
| Priority date | — |
| Expiry date | Mar 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer defines a plurality of chips arranged in array manner. Each chip includes at least one aluminum pad and a middle material. The middle material covers the aluminum pad and is mounted on the aluminum pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.