Processing of coherent and incoherent accesses at a uniform cache
US8117399B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2009 |
| Grant date | Feb 14, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Each cacheline of a unified cache storing information is marked as incoherent if the information was acquired incoherently or marked as coherent if the information was acquired coherently. A subsequent incoherent read access to a cacheline can result in a cache hit and a return of the cached information regardless of whether the cacheline is marked as coherent or incoherent. However, a subsequent coherent read access to a cacheline marked as incoherent will be returned as a cache miss regardless of whether the cacheline includes information sought by the coherent read access. In response to a cache miss for a coherent read access, a global snoop is initiated so as to query all other target components within the same coherency domain. In contrast, a cache miss resulting from an incoherent read access is processed using a non-global snoop to a limited set of one or a few target components in the coherency domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.