Method of manufacturing high-integrated semiconductor device and semiconductor device manufactured using the same
US8119509B2 · kind B2 · utility
3Cited by
1References
5Claims
0Family size
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Key dates
| Filing date | Jun 30, 2009 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Sep 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/63
Abstract
A semiconductor device comprises a plurality of vertical transistors each comprising barrier metal layers corresponding to source/drain regions in which a conduction region is formed under a channel region having a pillar form, and a bit line comprising a metal layer to connect the plurality of vertical transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.