High-Z structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels
US8120138B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2009 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Aug 5, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A structure for aligning a first set of features of a fabrication level of an integrated circuit chip to an electron beam alignment target. The structure including a first trench in a semiconductor substrate, the first trench extending from a top surface of the substrate into the substrate a first distance; an electron back-scattering layer in a bottom of the first trench; a dielectric capping layer in the trench over the back-scattering layer; and a second trench in the substrate, the second trench extending from the top surface of the substrate into the substrate a second distance, the second distance less than the first distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.