Signaling system with adaptive timing calibration
US8121237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2006 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | Oct 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a delay circuit, sampling circuit and delay control circuit that cooperate to carry out adaptive timing calibration. The delay circuit generates a timing signal by delaying an aperiodic input signal for a first interval. The sampling circuit samples a data signal in response to the timing signal to generate a sequence of data samples, and also samples the data signal in response to a phase-shifted version of the timing signal to generate a sequence of edge samples. The delay control circuit adjusts the first interval based, at least in part, on a phase error indicated by the sequence of data samples and the sequence of edge samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.