One time programmable memory test structures and methods
US8122307B1 · kind B1 · utility
19Cited by
169References
49Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2007 |
| Grant date | Feb 21, 2012 |
| Priority date | — |
| Expiry date | May 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One Time Programmable (OTP) memory structures and methods for pretesting the support circuitry are provided. A group of dedicated test cells associated with one or more groups of regular OTP cells are used to test the support circuitry for the regular OTP cells. The dedicated cells are programmed and read. The read values are compared to the programmed values or expected values. As a result of the comparison, failing memories may be designated “Not Usable”, while regular OTP cells of passing memories can be programmed for their purpose resulting in elimination of wasted memories during test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.