Semiconductor package and method of manufacturing the same
US8125061B2 · kind B2 · utility
1Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2009 |
| Grant date | Feb 28, 2012 |
| Priority date | — |
| Expiry date | Apr 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is provided. The semiconductor package includes a carrier, a die, a metal sheet and a molding compound. The die is disposed on the carrier. The metal sheet has a first portion and a second portion, wherein a receiving space is defined by the first portion and the second portion, and the second portion is electrically connected to the carrier. The molding compound covers the die and the receiving space is filled by at least part of the molding compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.