Semiconductor package and methods of manufacturing the same
US8129840B2 · kind B2 · utility
7Cited by
15References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2009 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Sep 29, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package include a substrate including a plurality of pads and a plurality of bumps evenly disposed on an entire region of the substrate regardless of an arrangement of the plurality of pads. According to the present invention, a simplification of a process can be accomplished, a cost of a process can be reduced, reliability can be improved and an under-filling can become easy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.