Phase-locked loop circuitry with multiple voltage-controlled oscillators
US8130044B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2008 |
| Grant date | Mar 6, 2012 |
| Priority date | — |
| Expiry date | Nov 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements. One or more of the voltage-controlled oscillators may be implemented using a separate integrated circuit connected using through-silicon vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.