Method of manufacturing a phase changeable memory unit having an enhanced structure to reduce a reset current
US8133757B2 · kind B2 · utility
2Cited by
1References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2009 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | May 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
A phase changeable memory unit includes a lower electrode, an insulating interlayer structure having an opening, a phase changeable material layer and an upper electrode. The lower electrode is formed on a substrate. The insulating interlayer structure has an opening and is formed on the lower electrode and the substrate. The opening exposes the lower electrode and has a width gradually decreasing downward. The phase changeable material layer fills the opening and partially covers an upper face of the insulating interlayer structure. The upper electrode is formed on the phase changeable material layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.