Power supply circuit that outputs a voltage stepped down from a power supply voltage
US8134349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2009 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | May 15, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/56
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A power supply circuit has a constant voltage circuit, a first MOS transistor, a second MOS transistor, a third MOS transistor, a first voltage dividing circuit that outputs a first divided voltage obtained by dividing the voltage of the output terminal by a first voltage dividing ratio, and a first differential amplifier circuit which is fed with a reference voltage and the first divided voltage and has an output connected to a gate of the second MOS transistor. The first differential amplifier circuit outputs a signal to turn on the second MOS transistor when the first divided voltage is higher than the reference voltage, and the first differential amplifier circuit outputs a signal to turn off the second MOS transistor when the first divided voltage is lower than the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.