Low EMC/EMI emissions' gate driver for wide supply voltage ranges
US8134388B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2006 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Dec 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method controls a power MOS transistor having a control terminal and a load path, the load path connected in series with a load between voltage supply terminals, wherein a power supply voltage between the voltage supply terminals imposes a load voltage across the load and a load path voltage across the load path of the power MOS transistor. The method includes generating a control current for the control terminal during a switching process when the power MOS transistor changes switching states. The control current is dependent on the power supply voltage and on at least one of the group consisting of the load path voltage and the load voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.