Indeterminate state logic insertion
US8136059B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2008 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Nov 26, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Illustrative embodiments provide a computer-implemented method for resolving indeterminate states by inserting logic into a design. The computer-implemented method receives an original design input from a requester to form a received input and determines whether the received input contains an indeterminate output. Responsive to a determination that the received input contains an indeterminate output, the computer-implemented method generates a temporary design from the received input, wherein the temporary design contains “unique” output and all inputs, updates the temporary design, and synthesizes the original design and each temporary design individually to form a synthesized original design and a set of synthesized temporary designs. The computer-implemented method merges the synthesized original design with the set of synthesized temporary design to form a final design; and returns the final design to the requester.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.