Asymmetric finFET device with improved parasitic resistance and capacitance
US8138030B2 · kind B2 · utility
21Cited by
5References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 15, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Mar 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a fin field effect transistor (finFET) device includes, forming a fin structure in a substrate, forming a gate stack structure perpendicular to the fin structure, and implanting ions in the substrate at an angle (θ) to form a source region and a drain region in the substrate, wherein the angle (θ) is oblique relative to the source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.