Inventor · White Plains, NY, US

Chung-Hsun Lin

149Patents
17h-index
91Co-inventors
89Inventor score

Filing activity: Apr 15, 2002 → Jan 9, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8362574B2 Faceted EPI shape and half-wrap around silicide in S/D merged FinFET Electricity 47 Active
US8669615B1 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Electricity 43 Active
US8536029B1 Nanowire FET and finFET Electricity 37 Active
US8722472B2 Hybrid CMOS nanowire mesh device and FINFET device Electricity 33 Active
US8362568B2 Recessed contact for multi-gate FET optimizing series resistance Electricity 32 Active
US8551833B2 Double gate planar field effect transistors Electricity 31 Active
US6666361B1 Baby-carrying bag Human Necessities 27 Expired
US8513131B2 Fin field effect transistor with variable channel thickness for threshold voltage tuning Electricity 27 Active
US8466012B1 Bulk FinFET and SOI FinFET hybrid technology Electricity 27 Active
US8658518B1 Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices Performing Operations; Transporting 27 Active
US8455313B1 Method for fabricating finFET with merged fins and vertical silicide Electricity 22 Active
US8936972B2 Epitaxially thickened doped or undoped core nanowire FET structure and method for increasing effective device width Electricity 21 Active
US8138030B2 Asymmetric finFET device with improved parasitic resistance and capacitance Electricity 21 Active
US8709888B2 Hybrid CMOS nanowire mesh device and PDSOI device Emerging Cross-Sectional Technologies 18 Active
US9157887B2 Graphene sensor Electricity 18 Active
US8928083B2 Diode structure and method for FINFET technologies Electricity 18 Active
US9412667B2 Asymmetric high-k dielectric for reducing gate induced drain leakage Electricity 17 Active
US8592264B2 Source-drain extension formation in replacement metal gate transistor device Electricity 16 Active
US8669167B1 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Electricity 14 Active
US8673731B2 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices Electricity 14 Active
US8896063B2 FinFET devices containing merged epitaxial Fin-containing contact regions Electricity 14 Active
US9006087B2 Diode structure and method for wire-last nanomesh technologies Emerging Cross-Sectional Technologies 12 Active
US8895372B2 Graphene based three-dimensional integrated circuit device Emerging Cross-Sectional Technologies 12 Active
US8927397B2 Diode structure and method for gate all around silicon nanowire technologies Emerging Cross-Sectional Technologies 12 Active
US9230989B2 Hybrid CMOS nanowire mesh device and FINFET device Electricity 12 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.