Semiconductor storage device
US8138048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2010 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Aug 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/512
Abstract
It is intended to provide a semiconductor device having a reduced thickness of a silicon nitride film on an outer periphery of a gate electrode of an SGT. A semiconductor device of the present invention is constructed using a MOS transistor which has a structure where a drain, a gate and a source are arranged in a vertical direction with respect to a substrate, and the gate is formed to surround a pillar-shaped semiconductor layer. The semiconductor device comprises: a silicide layer formed in an upper surface of each of upper and lower diffusion layers formed in upper and underneath portions of the pillar-shaped semiconductor layer, in a self-alignment manner, wherein the silicide layer is formed after forming a first dielectric film on a sidewall of the pillar-shaped semiconductor layer to protect the sidewall of the pillar-shaped semiconductor layer during formation of the silicide layer; and a second dielectric film formed, after forming the silicide layer and then removing the first dielectric film, in such a manner as to cover a source/drain region formed in the underneath portion of the pillar-shaped semiconductor layer, the gate electrode formed on the sidewall of the pilla…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.