Structure, structure and method for providing an on-chip variable delay transmission line with fixed characteristic impedance
US8138857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jun 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.