Variable resistance memory device and system thereof
US8139432B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2010 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Oct 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/2602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device comprising: a plurality of memory banks, each of which operates independently and includes a plurality of resistance memory cells, each cell including a variable resistive element having a resistance varying depending on stored data; a plurality of global bit lines, each global bit line being shared by the plurality of memory banks; a temperature compensation circuit including one or more reference cells; and a data read circuit which is electrically connected to the plurality of global bit lines and performs a read operation by supplying at least one of the resistance memory cells with a current varying according to resistances of the reference cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.