Test bench, method, and computer program product for performing a test case on an integrated circuit
US8140315B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Aug 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to a test bench, method, and computer program product for performing a test case on an integrated circuit. The test bench may comprise a simulation environment representing an environment for implementing the integrated circuit and a reference model of the integrated circuit, wherein the reference model may be prepared for running within the simulation environment. The test bench may further comprise a device for running a simulation on the reference model within the simulation environment. The reference model may be based on an original reference model provided for a formal verification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.