Configuration of memory management techniques selectively using mitigations to reduce errors
US8140892B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2008 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Jul 2, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for performing memory management to mitigate memory errors. In accordance with the principles described herein, a memory management module may be implemented that acts in different modes of operation for each of one or more software modules that are instances of applications. In one mode of operation, memory operations may be performed in accordance with one or more mitigation actions, and in another mode of operation, the memory management module performs memory operations as requested, without performing mitigation actions. A memory management module may maintain a record in a data store associated with the memory management module that may be used to determine whether to enable the mitigations. In some implementations, records maintained by each of a plurality of computing devices may be aggregated at a central server and this aggregated information may be used to adjust the entries on each of the computing devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.