System and method for common history pessimism relief during static timing analysis
US8141014B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2009 |
| Grant date | Mar 20, 2012 |
| Priority date | — |
| Expiry date | Aug 26, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for adjustment of modeled timing data variation as a function of past state and/or switching history during static timing analysis. One illustrative embodiment may include inputting and asserting at least one of initial signal history bound and explicit device history bound constraints for at least one signal of a circuit design and evaluating for a segment processed during a forward propagation of block based static timing analysis whether any input signal to a current segment has a bounded history, at least one of propagated and asserted. The method may further include evaluating for the segment whether history bounds are downstream from a gating restriction, and processing a next segment until there are no further segments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.