CMOS image sensor having double gate insulator therein
US8143626B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 12, 2010 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Apr 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
Abstract
A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors and a photodiode therein, wherein each transistor employs a gate insulator with a thickness ranging from 40 Å to 90 Å; and forming a logic circuit in the other predetermined location of the semiconductor substrate, the logic circuit having at least one transistor, wherein the transistor employs a gate insulator with a thickness ranging from 5 Å to 40 Å.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.