Patent · US Active

Chip-on-board package

US8143713B2 · kind B2 · utility

8Cited by
9References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 8, 2010
Grant dateMar 27, 2012
Priority date
Expiry dateNov 9, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3025
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Provided is a chip-on-board package. The chip-on-board package may include a board, a grounding pad on a first surface of the board, the grounding pad including a body portion and at least one line portion, and at least two conductive pads on the first surface, the at least two conductive pads being arranged adjacent to the body portion. The at least one line portion may extend between the at least two conductive pads and the at least one line portion may have a narrower width than the at least two conductive pads.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.