Jitter measuring system and method
US8144756B2 · kind B2 · utility
5Cited by
9References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2008 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Feb 28, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31709
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first signal and a second signal; and a converter for converting a phase different between the first signal and the second signal into a relevant digital code; wherein the phase difference between the first signal and the second signal is an amplification of jitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.