Inventor

Ji-Jan Chen

17Patents
3h-index
32Co-inventors
56Inventor score

Filing activity: Sep 19, 2008 → May 26, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US8832511B2 Built-in self-test for interposer Physics 22 Active
US8144756B2 Jitter measuring system and method Physics 5 Active
US10256828B2 Phase-locked loop monitor circuit Electricity 3 Active
US8707238B2 Method to determine optimal micro-bump-probe pad pairing for efficient PGD testing in interposer designs Physics 3 Active
US9269640B2 Repairing monolithic stacked integrated circuits with a redundant layer and lithography process Electricity 3 Active
US8113412B1 Methods for detecting defect connections between metal bumps Physics 2 Active
US8863062B2 Methods and apparatus for floorplanning and routing co-design Physics 2 Active
US10680627B2 Phase-locked loop monitor circuit Electricity 2 Active
US11025261B2 Phase-locked loop monitor circuit Electricity 1 Active
US8384455B2 Apparatus for clock skew compensation Physics 1 Active
US8614571B2 Apparatus and method for on-chip sampling of dynamic IR voltage drop Physics 1 Active
US9310431B2 Diagnosis framework to shorten yield learning cycles of advanced processes Physics 0 Active
US8051394B2 Yield evaluating apparatus and method thereof Physics 0 Active
US9766286B2 Defect diagnosis Physics 0 Active
US10156609B2 Device and method for robustness verification Electricity 0 Active
US11411571B2 Phase-locked loop monitor circuit Electricity 0 Active
US9847318B2 Monolithic stacked integrated circuits with a redundant layer for repairing defects Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.