System and method for deadlock free bus protection of resources during search execution
US8145816B2 · kind B2 · utility
0Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2004 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | Jul 20, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/74
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system of deadlock free bus protection of memory and I/O resources during secure execution. A bus cycle initiates entry of a bus agent into a secure execution mode. The chipset records an identifier of the secure mode processor. Thereafter, the chipset intercedes if another bus agent attempts a security sensitive bus cycle before the secure mode processor exits the secure mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.