Method of evaluating an architecture for an integrated circuit device
US8146040B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2009 |
| Grant date | Mar 27, 2012 |
| Priority date | — |
| Expiry date | May 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of evaluating an architecture for an integrated circuit device is disclosed. The method comprises generating a library of primitives for a predetermined architecture; transforming an original dataflow program into an intermediate format; transforming the intermediate format to a dataflow program defined in terms of the predefined library of primitives; and generating an implementation profile comprising information related to an implementation of the original dataflow program in an integrated circuit having the predetermined architecture. A method of evaluating an architecture for an integrated circuit device is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.