Method of fabricating semiconductor device with a high breakdown voltage between neighboring wells
US8148774B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2009 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Oct 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a semiconductor device in which an interval between first wells can be shortened by improving a separation breakdown voltage between the first wells and a method for manufacturing the same. A semiconductor device includes a first conductivity type semiconductor substrate 1, second conductivity type first wells 2 and 3 disposed on a surface layer of the semiconductor substrate 1 with a predetermined interval between them, a first conductivity type second well 4 disposed between the first wells 2 and 3 on the surface layer of the semiconductor substrate 1 and having an impurity concentration higher than that of the semiconductor substrate, a first conductivity type third well 5 at least disposed below the second well 4 in the semiconductor substrate 1 and having an impurity concentration higher than that of the semiconductor substrate 1 and lower than that of the second well 4, and a first conductivity type fourth well 11 at least disposed below the third well 5 in the semiconductor substrate 1 and having an impurity concentration higher than that of the semiconductor substrate 1 and lower than that of the second well 4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.