Reduction of back pattern dependency effects in memory devices
US8151166B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2008 |
| Grant date | Apr 3, 2012 |
| Priority date | — |
| Expiry date | Jan 19, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.