Patent · US Active

Method for fabrication of a semiconductor device and structure

US8153499B2 · kind B2 · utility

32Cited by
3References
29Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 27, 2011
Grant dateApr 10, 2012
Priority date
Expiry dateSep 27, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/837
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of manufacturing a semiconductor wafer, the method including: providing a base wafer including a semiconductor substrate, metal layers and first alignment marks; transferring a monocrystalline layer on top of the metal layers, wherein the monocrystalline layer includes second alignment marks; and performing a lithography using at least one of the first alignment marks and at least one of the second alignment marks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.