Combined distortion estimation and error correction coding for memory devices
US8156403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2007 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Aug 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory device (24) includes encoding data using an Error Correction Code (ECC) and storing the encoded data as first analog values in respective analog memory cells (32) of the memory device. After storing the encoded data, second analog values are read from the respective memory cells of the memory device in which the encoded data were stored. At least some of the second analog values differ from the respective first analog values. A distortion that is present in the second analog values is estimated. Error correction metrics are computed with respect to the second analog values responsively to the estimated distortion. The second analog values are processed using the error correction metrics in an ECC decoding process, so as to reconstruct the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.