Uniquification and parent-child constructs for 1xN VLSI design
US8156458B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2008 |
| Grant date | Apr 10, 2012 |
| Priority date | — |
| Expiry date | Sep 25, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments that create parent-child relationships for reuse of 1×N building blocks in a closed-loop 1×N system are disclosed. Some methods comprise generating a representation of an IC design, inserting a first 1×N building block into the representation, and creating an association between the first 1×N building block and a second 1×N building block. The association enables the first 1×N building block to inherit alterations of attributes of the second 1×N building block and enables unique alterations of attributes of the first 1×N building block which differ from the second 1×N building block. Further embodiments comprise an apparatus having an equivalency determiner to determine a logical equivalence between a two 1×N building blocks, an attribute creator that creates a set of attributes and enables one of the 1×N building blocks to inherit parent attributes and comprise child attributes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.