Method of manufacturing a multilayer printed wiring board with copper wrap plated hole
US8156645B2 · kind B2 · utility
2Cited by
4References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 5, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Dec 14, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Printed circuit boards have circuit layers with one or more via filled holes with copper wraps and methods of manufacturing the same. An embodiment of the present invention provides a method to enhance the consistency of the wraparound plating of through-hole vias of printed circuit boards with (requiring) via filling to provide extra reliability to the printed circuit boards and enables the designers and/or manufacturers of printed circuit boards to design and manufacture boards with relatively fine features and/or tight geometries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.