Clock synchronization in a memory system
US8159887B2 · kind B2 · utility
10Cited by
35References
46Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Jun 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for synchronizing a strobed memory system 10. During memory read and/or memory write operations the corresponding data strobe is sampled at the data destination 50/55 according to a local clock signal 71/73. Based on the results of the sampling, the data strobe and local clock signal are synchronized. In this manner, the data is synchronized to the local clock signal so that sampling of data at the data destination can be performed according to the local clock signal rather than the data strobe.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.