Boosting voltage levels applied to an access control line when accessing storage cells in a memory
US8164964B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2009 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | Oct 29, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory storage device is disclosed, the memory comprises: a plurality of storage cells for storing data; at least two access control lines each for controlling access to a respective at least one of the plurality of storage cells; at least two access control circuits each for controlling a voltage level supplied to a corresponding one of the at least two access control lines in response to an access request, the at least two access control circuits each comprising a capacitor and switching circuitry; routing circuitry for routing the access request and a boost signal to a selected one of the at least two access control circuits in dependence upon an address associated with the access request; wherein the at least two access control circuits are each responsive to: receipt of the access request from the routing circuitry to connect the selected access control line to a supply voltage; and receipt of the boost signal from the routing circuitry to disconnect the supply voltage from the access control line and to couple the boost signal to the access control line through the capacitor of the access control circuit to provide a boost to a voltage level on the access cont…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.