Power aware software pipelining for hardware accelerators
US8166320B2 · kind B2 · utility
1Cited by
6References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2010 |
| Grant date | Apr 24, 2012 |
| Priority date | — |
| Expiry date | Jun 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Forming a plurality of pipeline orderings, each pipeline ordering comprising one of a sequential, a parallel, or a sequential and parallel combination of a plurality of stages of a pipeline, analyzing the plurality of pipeline orderings to determine a total power of each of the orderings, and selecting one of the plurality of pipeline orderings based on the determined total power of each of the plurality of pipeline orderings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.