Vertical junction field effect transistors and diodes having graded doped regions and methods of making
US8169022B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2010 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Oct 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
Abstract
Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs) or diodes such as junction barrier Schottky (JBS) diodes or PiN diodes. The devices have graded p-type semiconductor layers and/or regions formed by epitaxial growth. The methods do not require ion implantation. The devices can be made from a wide-bandgap semiconductor material such as silicon carbide (SiC) and can be used in high temperature and high power applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.