Method, system, and apparatus for dynamic reconfiguration of resources
US8171121B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2008 |
| Grant date | May 1, 2012 |
| Priority date | — |
| Expiry date | Oct 14, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.